[Firm] Queries about writing a backend

David Given dg at cowlark.com
Sat Jul 11 14:16:19 CEST 2015

On 10/07/15 18:34, Matthias Braun wrote:
> Anyway I have fixed it enough to work with your example again. In
> general I’d recommend looking at the sparc and ia32 backends which are
> both fully functional.

Will do; thanks.

> The first step produces nodes with register requirements on each
> input/output but can’t know the final registers yet so you cannot select
> between 2- and 3-address variants yet. What I would recommend here is
> using 3 address operations and setting a should_be_same register
> requirement, that way the allocator tries to assign the same register to
> respective inputs/outputs where possible. In step 4 you can then change
> the 3op forms to 2op form in the cases where the register allocator
> succeeded in fulfilling the constraint.

I hadn't though of rewriting the instructions later. That makes a lot of

The tricky part is that I don't want to *force* the compiler to use a
low register when it doesn't make sense. If I tell the compiler that all
add instructions consume one of their inputs, then it'll generate:

mov r0, r20      ; four bytes
add r20, r20, r1 ; also four bytes

...rather than:

add r20, r0, r1  ; four bytes

But I also don't want to tell it that all instructions which consume
their inputs must be 2op instructions using low registers, because then:

eor r20, r21, r22 ; no 2op form of this; four bytes
mov r20, r0       ; four bytes
add r0, r1        ; two bytes

...rather than:

eor r20, r21, r22 ; four bytes
add r0, r20, r1   ; four bytes

I want to tell it, somehow, that using a low register is *advantageous*
over a high register, but is not required. (And it's certainly not worth
spilling a low register rather than just using a high register.)


As an alternative, is there any way to tell the compiler what registers
cost? That the compiler looks pretty keen on reusing registers anyway,
so it may be possible to simply tell it that r0-15 are cheaper than
r16-r31 and then just let the 2op instructions appear by chance. That
would be a whole lot easier and probably just as good.


Incidentally, doing some experimentation, I tried this:

Add => {
	template => $binop,
	emit     => '%D0 = add %S0, %S1',
	out_reqs => ['in_r0']

...but it will quite happily put D0 in a different register to S0. What
does 'in_r0' mean here?

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